Reconfigurable Computing - Lectures
Reconfigurable Computing
SE 461, Semester 1, 2005

Online resources

Links to online resources will be placed here as they become available. The lecture notes from the course given at ChungAng University are available below. This course will be similar and use most of this material. The actual lecture notes from the Auckland course will be added as the course progresses.

LinkSynopsis
Lecture Notes (SE461)
VHDL Fundamentals of VHDL
History - derivation from Ada
Basic syntax
Entities and architectures
Modeling styles - behavioural and structural
VHDL - Types and statements Basic Types
Subtypes
Libraries and packages
IEEE 1164 standard logic
Attributes
Procedural statements - PROCESS blocks
IF .. THEN .. ELSE
LOOPS
WAIT
CASE
VHDL
- Signals, Generics, etc
Facilities in VHDL for hardware design
  • Signal assignment vs variable assignment
  • Arrays and slice assignments
  • Generic models
  • Component Instantiation
  • ASSERT
  • Libraries
  • Generate
Design Flow with VHDL
  • Design flow
  • Test benches
  • Test benches with Altera
  • Self checking test benches
Resolution Functions When a signal has multiple drivers, VHDL requires you to define a resolution function which defines how conflicts are resolved.
Type Conversions VHDL (like its parent, Ada) is a strongly typed language: when a value of one type is assigned to a value of another, a type conversion function must be explicitly invoked.
FPGA structures Architectures of some commercially available FPGAs
Implementation issues - tradeoffs
  • Ripple carry adders
  • Fast carry logic
Verifying Circuits Testing circuit functions; Determining the test cases; Equivalence Classes; Random testing; Running tests
Adders Adders
Implementation issues - tradeoffs
  • Basics
  • Carry Select
  • Carry Lookahead
  • Choice criteria
  • Hybrid adders
  • Serial adders
  • Subtraction
  • 2's complement
Multipliers Multipliers
Implementation issues - tradeoffs
  • Binary multiplication
  • Basic hardware multiplier
  • Carry-Save adder
  • Multiplier trees
  • Serial multiplication
  • Pipelined multiplication
  • Multiplication by a constant
Design Options Design Issues
Number Systems Number Systems
  • Residue Numbers
Floating Point Numbers Floating Point Numbers
  • Lecture notes by B. Parhami,
    ECE Department, UCSB
CORDIC CORDIC Arithmetic
  • Basic method
  • Rotation mode
  • Vector mode
  • Implementations
Pipelining Pipelines
  • Principle
  • Register overhead
  • Balance
  • Pipelining in VHDL
  • Advanced pipelining
  • Pipeline hazards
  • Pipelined processors
Synthesizer Optimizations Synthesizer optimizations
  • Problem
  • Avoidance strategies
Lecture Notes (ChungAng University)
LinkSynopsis
VHDL Fundamentals of VHDL
History - derivation from Ada
Basic syntax
Entities and architectures
Modeling styles - behavioural and structural
VHDL - Types and statements Basic Types
Subtypes
Libraries and packages
IEEE 1164 standard logic
Attributes
Procedural statements - PROCESS blocks
IF .. THEN .. ELSE
LOOPS
WAIT
CASE
VHDL
- Signals, Generics, etc
Facilities in VHDL for hardware design
  • Signal assignment vs variable assignment
  • Arrays and slice assignments
  • Generic models
  • Component Instantiation
  • ASSERT
  • Libraries
  • Generate
Designing and Testing Design flow for VHDL models
FPGA structures Architectures of some commercially available FPGAs
Implementation issues - tradeoffs
  • Ripple carry adders
  • Fast carry logic
  • Carry select adders
  • Carry lookahead adders
  • Subtractors
  • Bit serial adders
Circuit Options Circuit design styles, focussing on adders due to their importance in almost all digital circuits
  • Serial circuits
  • Adders
  • Enhanced adders using fast carry logic
  • Faster and more complex adders
Circuit Options (Part B) Multipliers
  • Parallel array
  • Pipelined
  • Tree multipliers
  • High Radix multipliers
Multipliers Performance and resource tradeoffs are illustrated by studying several ways to implement multipliers
  • Bit parallel
  • Bit parallel with carry-save adders
Verifying Circuits Testing circuit functions; Determining the test cases; Equivalence Classes; Random testing; Running tests
Circuit Performance Measuring circuit performance
Experimental techniques
Need for experimental hypothesis
Test benches
Clocks Clock skew
Phase-locked loops
Simple, imprecise clocks
Advanced VHDL
Resolution Functions When a signal has multiple drivers, VHDL requires you to define a resolution function which defines how conflicts are resolved.
Type Conversions VHDL (like its parent, Ada) is a strongly typed language: when a value of one type is assigned to a value of another, a type conversion function must be explicitly invoked.
Table Driven Code Efficient, maintainable code
Table driven code
Test benches
Implementations
CORDIC Arithmetic Calculation of trig functions using the CORDIC (Coordinate Rotation by DIgital Computer) technique
CORDIC Implementation Implementations of CORDIC circuits
Space and performance tradeoffs
Memory Memory in FPGAs
Memory Organization
  • RAM
  • Shift Registers
  • FIFO
  • CAM
Bulk Memory in modern FPGAs; Overview of memory facilities in commercially available devices from various manufacturers
Pipelines Pipeline fundamentals
Pipelines in high performance processors
  • Stalls
  • Balance
Pipelines in VHDL; Implicit registers in Signals
Example: Pipelined multipliers
Applications A review of applications suitable for reconfigurable computing
Other resources
Example source All VHDL code examples
test_bench.vhdl Altera test bench skeleton