Measuring Data Cache and TLB Parameters under Linux (MSc Thesis)
Yuanhua (Yale) Yu
With the increasing gap between processor
speed and memory speed, cache memories are becoming more and more important to
the performance of the computer system. Nowadays not only computer architects,
but also performance programmers and algorithm designers must pay close
attention to the structural and performance parameters of memory systems. The
structural parameters of cache and TLB are becoming essential data to
performance programmers and algorithm designers, and the performance parameters
of cache and TLB are becoming very important metrics for system administrators
to evaluate and tune system performance. This thesis studies the methodology of
measurement of the structural and performance parameters of data cache and data
TLB, and implements a set of micro benchmarks under the Linux operating system
to measure parameters of the data cache and data TLB. Our micro benchmarks can
measure data cache capacity, data cache block size, data cache associativity, effective cache latency, effective data path
parallelism, data TLB size, data TLB associativity,
and TLB latency. This thesis also presents experimental results on Intel
Pentium II/266 and Pentium III/500 with an explanation and analysis of these
results. The measured structural parameters of the cache and TLB on Intel
Pentium II/266 and Pentium III/500 are consistent with the published data from
the Intel and the measured performance parameters are reasonable.