3.17.14 MIPS Options

These `-m' options are defined for the MIPS family of computers:

-mcpu=cpu-type

Assume the defaults for the machine type cpu-type when scheduling instructions. The choices for cpu-type are `r2000', `r3000', `r3900', `r4000', `r4100', `r4300', `r4400', `r4600', `r4650', `r5000', `r6000', `r8000', and `orion'. Additionally, the `r2000', `r3000', `r4000', `r5000', and `r6000' can be abbreviated as `r2k' (or `r2K'), `r3k', etc. While picking a specific cpu-type will schedule things appropriately for that particular chip, the compiler will not generate any code that does not meet level 1 of the MIPS ISA (instruction set architecture) without a `-mipsX' or `-mabi' switch being used.

-mips1

Issue instructions from level 1 of the MIPS ISA. This is the default. `r3000' is the default cpu-type at this ISA level.

-mips2

Issue instructions from level 2 of the MIPS ISA (branch likely, square root instructions). `r6000' is the default cpu-type at this ISA level.

-mips3

Issue instructions from level 3 of the MIPS ISA (64-bit instructions). `r4000' is the default cpu-type at this ISA level.

-mips4

Issue instructions from level 4 of the MIPS ISA (conditional move, prefetch, enhanced FPU instructions). `r8000' is the default cpu-type at this ISA level.

-mfp32

Assume that 32 32-bit floating point registers are available. This is the default.

-mfp64

Assume that 32 64-bit floating point registers are available. This is the default when the `-mips3' option is used.

-mgp32

Assume that 32 32-bit general purpose registers are available. This is the default.

-mgp64

Assume that 32 64-bit general purpose registers are available. This is the default when the `-mips3' option is used.

-mint64

Force int and long types to be 64 bits wide. See `-mlong32' for an explanation of the default, and the width of pointers.

-mlong64

Force long types to be 64 bits wide. See `-mlong32' for an explanation of the default, and the width of pointers.

-mlong32

Force long, int, and pointer types to be 32 bits wide.

If none of `-mlong32', `-mlong64', or `-mint64' are set, the size of ints, longs, and pointers depends on the ABI and ISA chosen. For `-mabi=32', and `-mabi=n32', ints and longs are 32 bits wide. For `-mabi=64', ints are 32 bits, and longs are 64 bits wide. For `-mabi=eabi' and either `-mips1' or `-mips2', ints and longs are 32 bits wide. For `-mabi=eabi' and higher ISAs, ints are 32 bits, and longs are 64 bits wide. The width of pointer types is the smaller of the width of longs or the width of general purpose registers (which in turn depends on the ISA).

-mabi=32

-mabi=o64

-mabi=n32

-mabi=64

-mabi=eabi

Generate code for the indicated ABI. The default instruction level is `-mips1' for `32', `-mips3' for `n32', and `-mips4' otherwise. Conversely, with `-mips1' or `-mips2', the default ABI is `32'; otherwise, the default ABI is `64'.

-mmips-as

Generate code for the MIPS assembler, and invoke `mips-tfile' to add normal debug information. This is the default for all platforms except for the OSF/1 reference platform, using the OSF/rose object format. If the either of the `-gstabs' or `-gstabs+' switches are used, the `mips-tfile' program will encapsulate the stabs within MIPS ECOFF.

-mgas

Generate code for the GNU assembler. This is the default on the OSF/1 reference platform, using the OSF/rose object format. Also, this is the default if the configure option `--with-gnu-as' is used.

-msplit-addresses

-mno-split-addresses

Generate code to load the high and low parts of address constants separately. This allows gcc to optimize away redundant loads of the high order bits of addresses. This optimization requires GNU as and GNU ld. This optimization is enabled by default for some embedded targets where GNU as and GNU ld are standard.

-mrnames

-mno-rnames

The `-mrnames' switch says to output code using the MIPS software names for the registers, instead of the hardware names (ie, a0 instead of $4). The only known assembler that supports this option is the Algorithmics assembler.

-mgpopt

-mno-gpopt

The `-mgpopt' switch says to write all of the data declarations before the instructions in the text section, this allows the MIPS assembler to generate one word memory references instead of using two words for short global or static data items. This is on by default if optimization is selected.

-mstats

-mno-stats

For each non-inline function processed, the `-mstats' switch causes the compiler to emit one line to the standard error file to print statistics about the program (number of registers saved, stack size, etc.).

-mmemcpy

-mno-memcpy

The `-mmemcpy' switch makes all block moves call the appropriate string function (`memcpy' or `bcopy') instead of possibly generating inline code.

-mmips-tfile

-mno-mips-tfile

The `-mno-mips-tfile' switch causes the compiler not postprocess the object file with the `mips-tfile' program, after the MIPS assembler has generated it to add debug support. If `mips-tfile' is not run, then no local variables will be available to the debugger. In addition, `stage2' and `stage3' objects will have the temporary file names passed to the assembler embedded in the object file, which means the objects will not compare the same. The `-mno-mips-tfile' switch should only be used when there are bugs in the `mips-tfile' program that prevents compilation.

-msoft-float

Generate output containing library calls for floating point. Warning: the requisite libraries are not part of GCC. Normally the facilities of the machine's usual C compiler are used, but this can't be done directly in cross-compilation. You must make your own arrangements to provide suitable library functions for cross-compilation.

-mhard-float

Generate output containing floating point instructions. This is the default if you use the unmodified sources.

-mabicalls

-mno-abicalls

Emit (or do not emit) the pseudo operations `.abicalls', `.cpload', and `.cprestore' that some System V.4 ports use for position independent code.

-mlong-calls

-mno-long-calls

Do all calls with the `JALR' instruction, which requires loading up a function's address into a register before the call. You need to use this switch, if you call outside of the current 512 megabyte segment to functions that are not through pointers.

-mhalf-pic

-mno-half-pic

Put pointers to extern references into the data section and load them up, rather than put the references in the text section.

-membedded-pic

-mno-embedded-pic

Generate PIC code suitable for some embedded systems. All calls are made using PC relative address, and all data is addressed using the $gp register. No more than 65536 bytes of global data may be used. This requires GNU as and GNU ld which do most of the work. This currently only works on targets which use ECOFF; it does not work with ELF.

-membedded-data

-mno-embedded-data

Allocate variables to the read-only data section first if possible, then next in the small data section if possible, otherwise in data. This gives slightly slower code than the default, but reduces the amount of RAM required when executing, and thus may be preferred for some embedded systems.

-muninit-const-in-rodata

-mno-uninit-const-in-rodata

When used together with `-membedded-data', it will always store uninitialized const variables in the read-only data section.

-msingle-float

-mdouble-float

The `-msingle-float' switch tells gcc to assume that the floating point coprocessor only supports single precision operations, as on the `r4650' chip. The `-mdouble-float' switch permits gcc to use double precision operations. This is the default.

-mmad

-mno-mad

Permit use of the `mad', `madu' and `mul' instructions, as on the `r4650' chip.

-m4650

Turns on `-msingle-float', `-mmad', and, at least for now, `-mcpu=r4650'.

-mips16

-mno-mips16

Enable 16-bit instructions.

-mentry

Use the entry and exit pseudo ops. This option can only be used with `-mips16'.

-EL

Compile code for the processor in little endian mode. The requisite libraries are assumed to exist.

-EB

Compile code for the processor in big endian mode. The requisite libraries are assumed to exist.

-G num

Put global and static items less than or equal to num bytes into the small data or bss sections instead of the normal data or bss section. This allows the assembler to emit one word memory reference instructions based on the global pointer (gp or $28), instead of the normal two words used. By default, num is 8 when the MIPS assembler is used, and 0 when the GNU assembler is used. The `-G num' switch is also passed to the assembler and linker. All modules should be compiled with the same `-G num' value.

-nocpp

Tell the MIPS assembler to not run its preprocessor over user assembler files (with a `.s' suffix) when assembling them.

-mfix7000

Pass an option to gas which will cause nops to be inserted if the read of the destination register of an mfhi or mflo instruction occurs in the following two instructions.

-no-crt0

Do not include the default crt0.

These options are defined by the macro TARGET_SWITCHES in the machine description. The default for the options is also defined by that macro, which enables you to change the defaults.