Computer Architecture
The Anatomy of Modern Processors

Table of Contents

• Course Overview
• Reading List
• Preface - What is Computer Architecture?

1. Processor Structure
   • 1.1 CISC and RISC Processors
   • 1.2 ALU
   • 1.3 Pipelines
   • 1.4 Memory Hierarchy
     • 1.4.1 Registers
     • 1.4.2 Cache
     • 1.4.3 Memory Management Units
     • 1.4.3.1 TLBs
     • 1.4.4 System Interface Units
     • 1.4.5 Bulk Memory
       • 1.4.5.1 Dynamic and Static RAM
       • 1.4.5.2 Synchronous RAM
     • 1.4.6 Magnetic Memory
   • 1.5 Input and Output
     • 1.5.1 Bus control
     • 1.5.2 Multiplexed Buses
     • 1.5.3 DMA
   • 1.6 Further Speed!
     • 1.6.1 Instruction Issue Unit
     • 1.6.1 Branch Target Buffers
2. Speed
   • 2.1 MIPS, GIPS and other myths
   • 2.2 Cycle Time
   • 2.3 RISC vs CISC
   • 2.4 CISC and microcode
   • 2.5 Superscalar Processors
   • 2.6 Superpipelined Processors
   • 2.7 VLIW
3. Some example processors
   • PowerPC 601
   • Processor Data
4. Parallel Processors
   • 3.1 Models
   • 3.2 SIMD
     • Systolic Arrays
   • 3.3 Vector Processors
   • 3.4 Cluster Computing
     • 3.4.1 Cache Coherence
     • 3.4.2 Network Topology
     • 3.4.3 Hypercubes
   • 3.5 Network Computing
5. Dataflow
6. Futures
   • 5.1 Sub-micron Technologies
   • 5.2 Optical Technologies

Key points - 1998 Lectures

Slides

• Slides from lectures.

Assignments